Electronics Engineer | Automotive Products (ADAS, Fuel Pump, Body Electronics) | Learning Rust
Michigan, U.S.
Joined August 2012
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Well, apparently JLCPCB disabled my account due to "internal compliance requirements." Back to PCBWay, or are there other fabs people are using instead?
Chameleon prototypes recently hit DRC 0! (meaning I could build them) I'll probably search for some more AI mistakes and waffle around on an architecture change to remove the one LDO, but prototypes should happen soon.
Third pass at this layout with Opus 5.5. It did a lot better, but I specified a lot of considerations to get the placement to be more sane. I'm running into a few nitpicks here and there but looks like it would function way better.
Working on some of my Dad repair pile tonight. This leapfrog tag pen had a dead SMT fuse F1. Jumpered for now, will do a proper replace later.
If I'm good I'll post a proper write up to my website for other dead pen owners.
An example on why AI PCB Layout (KiCAD/Opus 5.5/Freerouting) still sucks. Rather than directly connect crystal Y1, a 5V track interrupted, one side ran around it and the other went to IN.3 to jump across the 5V (a weirdly small jump that could've been gone around...)
A junior engineer wouldn't even do this.
Pumped to upgrade my old saleae to this
I just backed SLogic32U3 – The World's First 10Gbps USB3.2 Logic Analyzer on @kickstarter kickstarter.com/projects/sip…
Fory chameleon controller project I've been sourcing these enclosures from China that are supposed to be Molex CMC connector compatible, although they can come with their own knock off connector. Ordering some real Molex from Digikey and telling the difference is easy
Bob Adams 5 retweeted
We're hiring an FPGA & embedded engineer to join our hardware team. Can you make a CAN core from scratch in VHDL?
Email [email protected] with cool projects you've built!
Does anyone have a KiCAD / AI workflow for PCB layout they actually like? Claude seems to work very slowly and usually the output has weird mistakes, like 1100mm of extra distance between nets and their testpoints, or vias blocking pins, or clustering all the components...
Ugh, I let Claude do some things in my KiCAD libraries and when I updated symbols from libraries I got all this fantastic junk.
One thing that claude turned me on to that I likely never would've found with traditional search - @marimo_io as a tool for doing worst case circuit analysis. Pulls values from kicad analysis, automatically recalcs when I modify the python. Super cool.
I'm pretty happy with Opus 5 so far. This morning it resolved an unaligned hard fault that had been impossible for Sonnet 4 to figure out, and I was able to dump the supported PIDs for my Honda CRV!
