Ed Sperling (@Chip_Insider) profile picture

Ed Sperling

@Chip_Insider

Editor In Chief of Semiconductor Engineering #semiconductor #semiEDA #AI #embedded #verification #lowpower #test #DataAnalytics #automotive #ICmanufacturing #ML

 Silicon Valley
semiengineering.com
Joined April 2013
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Latest: HBM shortages threaten AI; TSMC price hikes; adv. packaging ramps; domain-specialized AI models; fab investments; Intel’s quantum move; Google expands TPUs; AI-driven earnings; CPU benchmarking methodology for agentic AI semiengineering.com/chip-ind… #semiconductor #semiEDA
Chip Industry Week In Review

Chip Industry Week In Review

HBM shortages threaten AI expansion; TSMC weighs price hikes; advanced packaging ramps; domain-specialized AI models; Infineon and UMC boost fab investments; Intel's quantum move; Lam and imec...

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Academic institutions are working to help students get the most out of AI tools while ensuring the next gen of engineers doesn’t cut corners on foundational knowledge semiengineering.com/ai-raise… #semiconductor #workforce #engineeringeducation #GenAI @PurdueEngineers @Cornell
AI Raises The Bar For Tomorrow’s Engineers

AI Raises The Bar For Tomorrow’s Engineers

Universities are redesigning curricula and assessments around judgment, validation, and technical depth.

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Ed Sperling@Chip_InsiderOct 27
Unprecedented demand for bandwidth calls for bringing optics closer to silicon through a fundamental rethinking of the optical interconnect roadmap. semiengineering.com/the-imec… @imec_int #interconnects #semiconductor #CPO #optics #photonics
The imec Report: Scaling Optical Interconnects For The AI Era

The imec Report: Scaling Optical Interconnects For The AI Era

Unprecedented demand for bandwidth calls for bringing optics closer to silicon through a fundamental rethinking of the optical interconnect roadmap.

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Bringing Down Test Costs For Co-Packaged Optics semiengineering.com/bringing… Pinpointing failures, ensuring known-good optical engines & controlling test costs become increasingly critical as photonics moves into advanced packages #CPO #CPOtest #semiconductor #failureanalysis #NPO
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Unprecedented demand for bandwidth calls for bringing optics closer to silicon through a fundamental rethinking of the optical interconnect roadmap. semiengineering.com/the-imec… @imec_int #interconnects #semiconductor #CPO #optics #photonics
The imec Report: Scaling Optical Interconnects For The AI Era

The imec Report: Scaling Optical Interconnects For The AI Era

Unprecedented demand for bandwidth calls for bringing optics closer to silicon through a fundamental rethinking of the optical interconnect roadmap.

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Special Report: Engineers are discovering many things they thought were process assumptions were actually wafer assumptions semiengineering.com/what-bre… #semiconductor #PLP #panellevelpackaging #advancedpackaging
What Breaks When Packaging Moves From Wafer To Panel?

What Breaks When Packaging Moves From Wafer To Panel?

Engineers are discovering many things they thought were process assumptions were actually wafer assumptions.

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Advanced packaging growth and capacity constraints are pushing more onto OSATs. semiengineering.com/foundrie… #semiconductor #OSATS #hybridbonding #foundry
Foundries And OSATs Increasingly Overlap

Foundries And OSATs Increasingly Overlap

Advanced packaging growth and capacity constraints are pushing more onto OSATs.

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Latest: CHIPS Act $389M; Micron’s memory roadmap; agentic AI for 3D-IC electrothermal co-design; Nvidia expands supply chain capacity; Tenstorrent $1.5B; China NAND fabs; 800V power for AI data centers; silicon photonics... semiengineering.com/chip-ind… #semiEDA #semiconductor
Chip Industry Week In Review

Chip Industry Week In Review

CHIPS Act $389M to power chips, vertical GaN, materials; Micron's memory roadmap; Nvidia expands supply chain capacity; Tenstorrent raises $1.5B; China NAND fabs; 800V power for AI data centers;...

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Chip Industry Technical Paper Roundup semiengineering.com/chip-ind… #semiconductor #gaafets #HBM #DRAM #3DIC #verification #semiEDA
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Chip Industry Week In Review semiengineering.com/chip-ind… CHIPS Act $; Micron’s memory roadmap; Nvidia expands supply chain capacity; Tenstorrent $1.5B; China NAND fabs; 800V AI data centers; China orders +$35B in Nvidia GPUs; Rambus-ChipAgents... #semiconductor @Infineon #semiEDA
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Advanced packaging, photonics, test, and AI are increasingly intertwined; very different conversations ahead. SEMICON West semiengineering.com/chip-sca… #semiconductor #advancedpackaging #SEMICONWest #photonics @SEMIconex @SEMIAmericas
Chip Scaling Moves Beyond The Transistor

Chip Scaling Moves Beyond The Transistor

SEMICON West 2026: Advanced packaging, photonics, test, and AI are increasingly intertwined; very different conversations ahead.

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Scaling Data Movement For Physical AI youtu.be/tt5Xcjf9MVo?si=5V5x… #PhysicalAI #chiplets #CPU #datamovement #chiplets @arteris_noc #coherency #semiconductor
Scaling Data Movement For Physical AI

Scaling Data Movement For Physical AI

Physical AI poses a host of new challenges for chip engineers. Thes...

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Semiconductor Engineering's latest special report semiengineering.com/why-phys… #PhysicalAI #AgenticAI #humanoids #robotics
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Synopsys CEO Sassine Ghazi talks about AI agents, the limits of autonomous engineering, digital twins, and the challenges facing 3D-ICs. semiengineering.com/how-clos… #semiEDA #chipdesign #AgenticAI @Synopsys #autonomouschipdesign #3DIC
How Close Are We To Fully Autonomous Chip Design?

How Close Are We To Fully Autonomous Chip Design?

Synopsys CEO Sassine Ghazi talks about AI agents, the limits of autonomous engineering, digital twins, and the challenges facing 3D-ICs.

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Latest: Fab expansion accelerates; China advances memory & EUV; Teradyne’s test deal; SEMICON West & OCP highlights; 3D SiP; TSMC & ASML signals; 300mm fab $; optical and 3D-compute startups funding; quantum HW... semiengineering.com/chip-ind… #semiconductor #semiEDA
Chip Industry Week In Review

Chip Industry Week In Review

Fab expansion accelerates; China advances memory and EUV; Teradyne's test deal; SEMICON West and OCP highlights; 3D SiP; TSMC and ASML signals; 300mm fab spending; optical and 3D-compute startups...

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Agentic workloads increase CPU demand, while reasoning models, MoE architectures, and reservoir computing fuel AI acceleration. semiengineering.com/agentic-… #GPU #CPU #AgenticAI #semiconductor
Agentic AI Alters The CPU-GPU Balance

Agentic AI Alters The CPU-GPU Balance

Agentic workloads increase CPU demand, while reasoning models, MoE architectures, and reservoir computing fuel AI acceleration.

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Streaming sensor data creates new challenges for advanced process control. semiengineering.com/shift-le… #semiconductor #fabs #semiconductormanufacturiong
Shift Left Complicates Fab Data Management

Shift Left Complicates Fab Data Management

Streaming sensor data creates new challenges for advanced process control.

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Startup Funding: Q3 2026 semiengineering.com/startup-… 80 startups raised $8.5B in Q3, with big hauls by companies tackling data movement and memory. #startups #AIhardware #semiconductor #semiEDA #photonics #quantum #startupfunding
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Latest: $2B foundry pact; hyper-NA EUV; TSMC, Samsung $; Canon's nanoimprint; AI chips under scrutiny; $10T data center buildout; $1.5B SiC boost; chip smuggling; 800V power; quantum HW scales up; wireless EV road charging; mobile fab... semiengineering.com/chip-ind… #semiconductor
Chip Industry Week In Review

Chip Industry Week In Review

$2B foundry pact; hyper-NA EUV; TSMC, Samsung financials; Canon readies nanoimprint; AI chips under scrutiny; $10T data center buildout; $1.5B SiC boost; chip smuggling; 800V power gains traction;...

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CPO Testing Faces A Moving Target Problem: Test vendors are adapting to changing connector architectures and extreme alignment tolerances as co-packaged optics heads toward mainstream. semiengineering.com/cpo-test… #CPO #CPOtest #semiconductor #datacenters #NPO #copackagedoptics
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