Antmicro is a software-driven tech company developing open and modern industrial edge and cloud AI systems.
Joined May 2011
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Antmicro retweeted
CHIPS Alliance’s open source I3C Core now includes Host Controller support implemented by @antmicro.
The Controller can assign Dynamic Addresses, send commands, read/write data, and manage bus ownership.
chipsalliance.org/news/imple…
Antmicro retweeted
CHIPS Alliance will join the Open Source EDA BoF at @DACconference 2026 on July 28. Michael Gielda (@antmicro) will share CHIPS Alliance updates, and Krzysztof Bieganski (@antmicro) will cover four-state logic & UVM compatibility in Verilator. 🔗chipsalliance.org/news/chips…
Antmicro retweeted
An initial milestone has been reached in @antmicro’s work on four-state logic in Verilator.
The proposed implementation uses the experimental --fourstate flag. Significant Verilator efforts converge in the CHIPS Alliance SV Tools Project.
🔗 chipsalliance.org/news/initi…
Antmicro retweeted
#ZephyrRTOS goes to space again 🚀 @antmicro shares how it supports Aethero’s next-gen NxN and NxA space computers, built around NVIDIA Jetson Orin and Thor edge AI platforms with Zephyr-controlled onboard systems.
Read more: hubs.la/Q04nhhp90
Antmicro retweeted
At @FossiFoundation's Latch-Up 2026, Karol Gugala (@antmicro) covered CHIPS Alliance work toward a unified open source ASIC design and DV workflow, including SV Tools, VeeR, RISC-V DV, example SoC integration, emulation, and Topwrap.
Watch: youtu.be/OWx3Bz25me4?si=1fno…
Antmicro retweeted
CHIPS Alliance participated in #OCPBarcelona26, where @Google and @antmicro met with attendees to discuss open source silicon development. Our recap covers Caliptra, OpenPRoT sessions, and Antmicro's Guineveer demo based on the VeeR EL2 core.
🔗 bit.ly/4fHi1AH
Antmicro retweeted
Dual-core Lockstep has been added as an optional feature in VeeR EL2.
A new blog from @Antmicro explains the DCLS architecture, configuration, and verification, plus potential uses in radiation hardening and side-channel mitigation.
🔗 chipsalliance.org/news/imple…
Antmicro retweeted
New blog: @antmicro introduces the Zephyr Sensor Anomalies library for anomaly detection on MCUs, with background sensor data processing and Kenning-based model evaluation.
Read more: hubs.la/Q04nhbR60
#ZephyrRTOS
Antmicro retweeted
Zephyr RTOS has reached space again! Read how @antmicro and @AetheroSpace are using Zephyr-controlled companion MCUs in NxN and NxA space computers built around NVIDIA Jetson Orin and Thor edge AI platforms.
hubs.la/Q04kKb_30
Antmicro retweeted
#CHIPSAlliance launched the #SVTools Project to facilitate open source development of SystemVerilog and UVM codebases. The initiative groups tools like Verible and Synlig for #OpenSourceSilicon and #OpenHardware. @antmicro @google
🔗 chipsalliance.org/news/sv-to…
Antmicro retweeted
CHIPS Alliance is heading to #OCP EMEA 2026 (April 29–30). Join us at Booth B54 with @Google & @antmicro to discuss #OpenSourceSilicon and see the Guineveer RISC-V design. Sessions cover #Caliptra, OpenPRoT, and AI infrastructure.
🔗 chipsalliance.org/news/chips…
Antmicro retweeted
Designing a System-on-Chip (SoC) typically involves significant reuse. Our latest blog explains how
@antmicro uses Topwrap and the Guineveer reference design to build modular #RISCV SoCs and integrate I3C cores. #OpenSourceSilicon #CHIPSAlliance
chipsalliance.org/news/desig…
Antmicro retweeted
Renode received a new GUI! Experiment with a new way of interacting, combining all the different aspects of Renode into a single viewport, and see how it can be easily integrated with WebUIs such as @antmicro's System Designer renode.io/news/experimental-…
Antmicro retweeted
#CHIPSAlliance will be at 2026 OCP EMEA Summit, April 29-30 in Barcelona 🇪🇸 Visit Booth B54 for a live demo and discussions on #OpenSourceSilicon.
With @google and @antmicro
🔗 chipsalliance.org/events/
#OpenHardware
Antmicro retweeted
Want a modern touch GUI on a Zephyr-based MCU?
Zephyr ecosystem member @antmicro introduces grvl, a lightweight, open source GUI library using XML + embedded JavaScript.
Read the blog to learn more. hubs.la/Q043H7SZ0 #opensource #ZephyrRTOS
Antmicro retweeted
#ZephyrRTOS can run as a unikernel combining app + OS into a single binary for faster boot, lower resource use, & improved performance. In this blog,@antmicro shares benchmarks, security features, & support for Virtio, virtiofs, & bootargs. Read the blog: hubs.la/Q03XvP7b0
Antmicro retweeted
Michael Gielda (@antmicro) will share at the Zephyr Project Meetup co-located with @embedded_world on how Antmicro + @ADI_News are making AI on Zephyr easier with:
✅ AutoML (Kenning)
✅ Zephelin Profiling Library
✅ Zephelin Trace Viewer
Learn more: hubs.la/Q03RlmPx0
ALT Zephyr Project Meetup @ Embedded World, North America - Nov 5,2025- Michael Gielda, VP Business Development, Antmicro
Antmicro retweeted
Join us for the Zephyr Project Meetup at Embedded World North America! Featuring speakers from @linuxfoundation, @RenesasGlobal, @NXP, @qtproject, @croxel, @antmicro & @Infineon. Learn more: hubs.la/Q03QV1Cs0 @embedded_world @embedded_USA #ew25
Antmicro retweeted
✅ We had a great time showcasing our latest #FPGA-based security and datacenter solutions alongside our innovation partners @AMI_PR, @antmicro, @nuvoton, @NXP, @quside, and @SecEdge_Inc at #OCPSummit25. View Lattice FPGA datacenter solutions: bit.ly/499Dwqu
Antmicro retweeted
📅 #OCPSummit25 kicks off tomorrow! Join Lattice and our innovation partners @AMI_PR, @antmicro, @nuvoton, @NXP, @quside, and @SecEdge_Inc to learn how we’re enabling secure, intelligent infrastructure for the AI era. bit.ly/4mubFnS
