A research lab for the next era of silicon design
San Francisco, CA
Joined March 2026
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3D chips are the future and Archgen is here to make it happen.
@archgen_ is building skyscrapers for semiconductor chips
Shrinking transistors is getting harder. Stacking them makes heat harder to manage. We’re building the tools to design chips in three dimensions.
We stack transistors vertically, shorten connections, and optimize timing and heat together.
Our foundational model for thermal simulation, predicts temperature roughly 5,000× faster than conventional EDA tools.
Our placement engine ranked #1 in HRT’s macro-placement challenge
We’re working with some of the largest fabs in the world to tape out our first chip in April 2027
archgenlabs.com
Archgen Labs (YC F26) retweeted
today we are launching @archgen_ ArchgenLabs.
something we've spending day and night.
We're building 3D chips and the EDA tools to make it.
excited for whats ahead !
@archgen_ is building skyscrapers for semiconductor chips
Shrinking transistors is getting harder. Stacking them makes heat harder to manage. We’re building the tools to design chips in three dimensions.
We stack transistors vertically, shorten connections, and optimize timing and heat together.
Our foundational model for thermal simulation, predicts temperature roughly 5,000× faster than conventional EDA tools.
Our placement engine ranked #1 in HRT’s macro-placement challenge
We’re working with some of the largest fabs in the world to tape out our first chip in April 2027
archgenlabs.com
Archgen Labs (YC F26) retweeted
in addition to 3d, theres also more and more constraints from power delivery and thermal/cooling. Better start from thermal before you realize way later that your package would crack or your power delivery vias would melt
@archgen_ is building skyscrapers for semiconductor chips
Shrinking transistors is getting harder. Stacking them makes heat harder to manage. We’re building the tools to design chips in three dimensions.
We stack transistors vertically, shorten connections, and optimize timing and heat together.
Our foundational model for thermal simulation, predicts temperature roughly 5,000× faster than conventional EDA tools.
Our placement engine ranked #1 in HRT’s macro-placement challenge
We’re working with some of the largest fabs in the world to tape out our first chip in April 2027
archgenlabs.com
Archgen Labs (YC F26) retweeted
Was insightful listening to PG, Jessica and Garry talk about the OG YC batches
@paulg @jesslivingston @garrytan @ycombinator
Archgen Labs (YC F26) retweeted
Is it a chip? Is it a wafer?
It’s Cerebras Wafer Scale Engine.
@cerebras
#semiconwest
Archgen Labs (YC F26) retweeted
A little late, but excited to finally share this.
@archgen_ is backed by @ycombinator
Chip design needs a new stack for the 3D era. We’re building it at @archgen_ .
If you’re working in semiconductors, we’d love to grab a coffee.
Archgen Labs (@archgen_) is now backed by Y Combinator (@ycombinator)
We are a research lab for silicon design, with one ambition: make chip design 1,000× faster.
For decades, computing advanced by shrinking transistors. The next chapter for compute workloads will increasingly depend on building vertically - stacking active logic layers to create 3D chips.
This makes designing those chips much harder but also opens up new possibilities for performance and efficiency.
At @archgen_ , we’re bringing together foundational models, EDA tools, and physics-informed surrogate models to explore more designs, predict their behavior faster, and optimize how they’re built.
Grateful to Kulveer Taggar (@kul), Garry Tan (@garrytan) and the @ycombinator team for backing us, and to the customers, mentors, and collaborators who have helped us get here.
If you want to get to tapeout faster, we’d love to talk. DM us.
#Semiconductors #OpenROAD #OpenLane #OpenSourceEDA #ChipDesign #VLSI #PhysicalDesign #AIForHardware #3DIC
@naveen_venk
Archgen Labs (YC F26) retweeted
hippodupac caught me cold approaching @paulg
Archgen Labs (YC F26) retweeted
@mercatus was one of the earliest believers in us.
At the time, @naveen_venk and I had no product, no customers and very little money.
We were two twenty-somethings with a thesis: AI could fundamentally change how chips are designed.
Most people did not believe us. But @srajagopalan and emergent ventures did.
Their $15,000 grant allowed us to incorporate @archgen_ , keep building and gain access to the GCP credits we needed to run our early experiments.
That compute helped us develop the optimization system that eventually ranked #1 in the Macro Placement Challenge from @WeAreHRT and Partcl
That first check was more than capital. It gave us time, credibility and the confidence to continue before there was much evidence that we would succeed.
Today, @archgen_ is backed by @ycombinator
We are still pursuing the same belief: chip design can become dramatically faster through AI.
Thank you, @srajagopalan and @tylercowen for believing before it was obvious.
Archgen Labs (YC F26) retweeted
Some of the AI chip design nerds at Semicon #SEMICONWest
@RithikWasHere @kevingubbi @naveen_venk @RahulBhagwat01
Archgen Labs (YC F26) retweeted
Any sufficiently advanced engineering is indistinguishable from magic
Archgen Labs (YC F26) retweeted
@lossfunk is one of the highest-talent-density startup communities in the world.
It has been an important part of our journey at @archgen_ , and we're grateful to @paraschopra, @ Jay Joshi and @whyloop_ for the energy they have invested in bringing ambitious builders together.
Thank you to the entire Lossfunk community for creating this in Bangalore. Excited to see what comes out of it next!!
@naveen_venk
Some exciting updates!
A bunch of @lossfunk residents have raised funding + a few Lossfunk incubated companies have received $25k each in Google Cloud compute credits. More details below 👇
---
@HariAyapps, who's building @archgen_, got into YC W26 🥳🥳
Residents who started building at Lossfunk got into @joinef S26: the @oruel_inc team (@chastronomic, @prb5h, @nihipap) and @suryamaddula_ building @WhisperwaveAI
Former Lossfunk researcher @harshablast started Dirac Robotics as part of @joinef S26
---
A total of $175,000 in compute credits has already been disbursed to 7 Lossfunk-incubated companies, and 9 more are in the process of receiving them.
Thanks, @googlecloud, for the credits.
• athenaagent: @sachdh
• attenor: @ViraajG1
• autr: @V_J_S_1
• fpvlabs: @levelheaded_94
• grit: @timbresociety
• prometei: @navbenny
• scoutfox
Archgen Labs (YC F26) retweeted
@naveen_venk and I finally met our maker today
Thank you so much @srajagopalan @tylercowen and the @mercatus team for believing in young founders with crazy ideas. At 24 we are probably the oldest founders at @mercatus xD
Unparalleled talent density at emergent ventures
Archgen Labs (YC F26) retweeted
Thank you to everyone who attended the first-ever @hackerfabindia × @archgen_ session on semiconductors design and fabrication at LocalHost HQ last week!
More than 50 people joined us to explore how open-source initiatives such as openROAD and the Open-Source FPGA Foundation are helping democratize custom semiconductor design and fabrication.
A special thank-you to @aryamman_bhatia for taking time out of his incredibly busy schedule to explain how people can build their own fabs, even without cleanrooms, massive capital investments, or traditional infrastructure.
Huge thanks as well to @suhasasumukh for hosting us at @localhostIND.
@naveen_venk and I had a fantastic time discussing open-source chip design and sharing how Archgen AI is helping grow the community through our agentic EDA systems.
#Semiconductors #OpenSourceEDA #ChipDesign #HackerFab #VLSI #AgenticEDA
Archgen Labs (YC F26) retweeted
@naveen_venk and I had an awesome chat with @aryamman_bhatia about how chip design can be made more accessible and open.
Would love to share some of our learnings over coffee tomorrow on how you can build your own semiconductor chip. Do register!!
@archgen_ @hackerfabindia
Organising a meetup, with @HariAyapps @naveen_venk to discuss the work we’re doing @hackerfabindia and @archgen_ as well as semiconductors in general.
If you’re in BLR at 7pm, 9th Aug and interested in semiconductors- you should definitely drop by.
luma.com/jw1cwxxw
Archgen Labs (YC F26) retweeted
Such a cool informative session on "How to build a semiconductor chip?" by our friends @HariAyapps and @naveen_venk at Archgen(@archgen_) with @aryamman_bhatia from HackerFab(@hackerfabindia).
Archgen Labs (YC F26) retweeted
Got a chance to host @aryamman_bhatia at @lossfunk.
We talked about what it'll really take to design and fabricate cutting edge semiconductors from india
Archgen Labs (YC F26) retweeted
On our way to @lossfunk to talk about how to use AI to design better semiconductor chips!!!
