ezra wolf (@ezrwolf) header
ezra wolf (@ezrwolf) profile picture

founding Si @zettascale 3X ASIC tapeout, 1X satellite, HDI circuitry

SF
Joined May 2026
Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)Photo by ezra wolf (@ezrwolf)
> "our chip perf is higher" > *looks inside* > MFU and MBU below 30% > quantized lol
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ezra wolf retweeted
Introducing XPU Grasshopper, an AI chip co-designed with AI for the era of recursive self-improvement It went from its first tokens to 816x faster in 13 weeks Pre-order the FPGA devkit: zscc.ai/grasshopper
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ezra wolf retweeted
that one homie that faces trials and tribulations at every turn
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exercise your humanity to be a persistence hunter
i have no life man its just work and sleep
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The last thing you see before they add electrolytes to the water supply
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over the weekend i built a small FPGA compiler by hand for my custom HDL using a simple greedy PNR algorithm, it builds a small UART program roughly as fast as yosys and produces a valid bitstream for my iCE40-HX8K
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ezra wolf retweeted
i’ve gotta say whoever set this system up did pretty well, we are perfectly enslaved
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XPU mention (the XPU memetic psyop is working)
1/n OPENAI JALAPENO - Scale Up Domain: The most striking detail of Jalapeno is that its scale up domain can have 2048 XPUs compared to only 72 of NVL72. They divide scale up in local and global domains - use copper for local (higher bandwidth) and use optical transreceivers for global (lower bandwidth). Quote: OpenAI can connect up to 2,048 Jalapeño XPUs within a single scale-up network. The scale-up network consists of two domains, a local domain connecting all 128 XPUs over backplane within the rack, as well as a global domain connecting 2,048 XPUs over 16 racks using a hybrid of copper and optical interconnect. Each rack consists of 8 Chana switch trays. Six Chana switches in the middle are for the local domain, which come with one 102.4T Tomahawk 6 switch ASIC each. Two Chana switches at the top and bottom of the local switches are for the global domain, which we think could consist of 2x 102.4T Tomahawk 6 switches making up to 204.8T per switch tray.
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ezra wolf retweeted
the etched investor meetings are probably a riot. "george says..."
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microslop is a great example of what happens when you try to do everything simultaneously. you don't even get mediocre.
why is anything from microsoft crumbling and just generally bad? > github goes down every week. > vscode got lapped by cursor. > copilot lost the coding race. > skype died. > team is just… idk ok at best. the microsoft infrastructure is crumbling 😬
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ezra wolf retweeted
announcement: mass manufacturing begins. we are going to deploy 10,000 units.
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what horrible news. @grok is the 6502 affected by this
New exploit: “xor dword [0xf80c2094], 1<<22” Unlocks CPU microcode, the platform security processor, system management mode, and every internal processor register, all at once, on 100 million AMD CPUs. As far as I can tell can’t be fixed. github.com/xoreaxeaxeax/skit…
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We release Needle 2: A 14MB agentic LLM for phones, wearables, smart home, robots and microcontroller. The whole model is a single 14MB binary that runs a full session in 28MB of RAM. It is built on our Simple Attention Network findings, compressed to CQ2-bit with Cactus Quants, and baked into its own engine. Needle 2 has 45m parameters trained from the ground up on 140B tool call, device use structured generation tokens. On mobile device use benchmarks, Needle 2 trades wins with frontier small LLMs like LFM2.5 230M, Apple FM Gemma-270m, at 5× to 70× smaller, and 2 bits against their f16. Needle hits 500 tokens/sec decode speed on a Raspberry Pi 5, between 400–1,500 tokens/sec on VR devices like Meta Quest 3S and Apple Vision Pro, and ranges 300–700 on sub-$200 phones such as the Samsung A-Series. Needle also runs on newer microcontrollers like ESP32. A conventional transformer of Needle's width and depth spends 164 MFLOPs per token, and even one squeezed down to Needle's parameter count spends 87, Needle spends 70. Even on a high-end phone, an always-on assistant lives inside a power budget; every MFLOP is milliwatt-hours, and Needle spends 7x to 85x fewer of them per token than the smallest performant LLMs. Read more: cactuscompute.com/needle
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san francisco is a land of people named Icarus and not enough sun.
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very hot ASIC + very hot PMICs in one localized area is bad
why are we doing vertical power delivery instead of vertical optical IO?
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TinyMOA RV32I is now smaller at 927 LUTs, with RV64I at 1834 LUTs, where PicoRV32 regular is 917 LUTs next up is RV32GC to run Linux github.com/EzraWolf/TinyMOA
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Georgists when they learn that the people who raised the capital, purchased the asset, performed the required maintenance, and paid the attendant opportunity costs disproportionally benefit when prices go up
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ezra wolf retweeted
> be me, chatting about potential PCB fabs with a team member > head out to interview a candidate over coffee > @dwarkesh_sp randomly walks by > one of our investors strolls past 10 minutes later and says hi > run into the same team member on the way back > then coincidentally meet two founders building a new PCB fab in the US SF really is one of the most serendipitous places on the planet
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maslow's hierarchy of silicon needs
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ezra wolf retweeted
Books written before gpt 3.5 are now pre-nuclear steel
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