RISC-V is a teenager! Happy Birthday RISC-V, 13 years old today. Good day to take a look back at the 10th anniversary videos and see how much has changed in such a short time:
riscv.org/risc-v-10th/
Krste Asanovic retweeted
Join our tutorial on FireSim and Chipyard at @HpcaArchConf 2023 on February 26th! Attendees will work hands-on with the Chipyard @RISC_V SoC generator and deploy fast FPGA-based simulations using FireSim on @awscloud EC2 F1 instances. Learn more: fires.im/hpca-2023-tutorial/
Krste Asanovic retweeted
Thank you for joining us at #RISCVSummit 2022! With over 900 in-person and virtual attendees, this year’s summit has had an immeasurable impact on the @risc_v ecosystem. #RISCVEverywhere
Happy to announce a video of my talk from the @SiFive office opening in Cambridge is now available online: youtube.com/watch?v=RrVRMFjY… #riscv
It was great sharing a stage with Cliff to explain how the @SiFive x280 + VCIX interface allows customers to tightly connect their custom accelerators to a full-featured @risc_v vector core.
Reduce latency? “The promise is to get accelerators and general purpose cores right next to each other,” Cliff Young TPU architect at Google. Working with SiFive? “I don’t know how to get them closer.” #AIHardwareSummit #RISCV #Google
RISC-V heads to the stars! More details on @sifive @risc_v cores being selected by NASA for future missions: businesswire.com/news/home/2… #riscv
Excited to be presenting at the AI HW Summit on Sept 15. I'll be describing how our customers are using our RISC-V Intelligence vector cores in their AI silicon designs.
Join us at the #AIHardwareSummit from Sept. 13-15 in Santa Clara, CA! Hear from Krste Asanovic, SiFive co-founder, about how #RISCV and vector compute are gaining momentum, addressing today’s computing challenges, and more. hubs.la/Q01lh3C00 #NoLimits
Pat Gelsinger's Keynote from @hotchipsorg 34 is now available online.
As digitization of everything around increases, so does the demand for chips. Delighted to discuss what it means to be a systems foundry as part of our IDM 2.0 strategy #HotChips34. Will help support the industry's growing demand for more semiconductors. youtube.com/watch?v=I0PSz2aD…
Thanks @PGelsinger for an inspiring keynote today, and for spending the time to engage with the @hotchipsorg audience in an insightful live Q&A session.
There has never been a better, or more important, time to be a technologist. We must all be ambassadors for the crucial role semiconductors play in life today. Together, we will enter the "Golden Age" of semiconductors.
Thank you @hotchipsorg for having me.
Looking forward to catching up with everyone in Cambridge, my old stomping grounds (Churchill, U
'84, EIST).
New features for @firesimproject, appearing at OSCAR @ISCAConfOrg !
Local FPGA support (@XilinxInc U250) and distrib SW sims are coming to FireSim this week! @KarandikarSagar and @NayiriKr will cover these features at OSCAR 2022 at @ISCAConfOrg on Saturday. Thanks to great work by @davidbiancolin @abejgonza @TimSnyderATX! oscar-workshop.github.io/Pro…
Happy 12th Birthday RISC-V! This was an amazing year with 15+ new extensions expanding the @risc_v universe and billions of SoCs shipped. Thanks to the entire community for the incredible growth.
RISC-V goes to 11! Happy Birthday to the free and open RISC-V ISA - here's a look back to the 10th year anniversary videos:
riscv.org/risc-v-10th/
Krste Asanovic retweeted
It’s official, we’re the first #RISCV unicorn! Our new Series F funding will help accelerate our growth as we continue our goal of bringing RISC-V everywhere. Read more about this milestone as we prove that RISC-V has #NoLimits: hubs.la/Q0164CvP0
Krste Asanovic retweeted
Get ready for 3 days of #RISCV and #opensource hardware from May 3 -5 in Paris! Join us for keynotes, tutorials, panels and technical sessions from leading experts at the RISC-V Spring Week 2022: bit.ly/37iKGuD
