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Riding, everywhere
Joined July 2008
Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)Photo by Nick Barcet (@nijaba)
Nick Barcet retweeted
😭😩 My Captain
In lieu of flowers, memorial contributions may be made to: Johns Hopkins Alzheimer’s Disease Research Center Fund    alzresearch.org/giving/ Alzheimer’s Foundation of America Caregiver Resources     alzfdn.org/donate/ Photo Credit: Tommy Garcia
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Nick Barcet retweeted
Our first LMCache meetup in the San Francisco Bay Area was on 22 October 2026 at Samsung Semiconductor in San Jose, co-hosted by Dongjoo Seo of Samsung and Karsten Wade of Tensormesh. Samuel Shen of Tensormesh led a hands-on notebook session. Luis Chamberlain of Samsung spoke on asymmetric quantization, dma-buf with io_uring, and Cartridges. Dongjoo Seo closed with LMCache on CXL memory. If you missed it, the recap has all the slides and Sam's notebook, which runs LMCache on a laptop with no GPU. na2.hubs.ly/H08J0bq0
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CacheBlend reuses KV cache anywhere in the prompt, not just shared prefixes: 𝟮.𝟱𝘅 𝗳𝗮𝘀𝘁𝗲𝗿 𝘁𝗵𝗮𝗻 𝗽𝗿𝗲𝗳𝗶𝘅 𝗰𝗮𝗰𝗵𝗶𝗻𝗴 𝗼𝗻 𝗥𝗔𝗚. So what happens when that cache moves off RAM onto IBM Storage Scale? @IBM @nvidia @Supermicro 🔗👇 na2.hubs.ly/H08zm740
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Day 1 of The AI Conference SF is in the books! 🎉 Come say hi to the team at Booth #214. We're excited to show how Tensormesh Platform can speed up AI inference and cut GPU costs with intelligent KV caching. See you on Day 2! #TheAIConference #AIInfrastructure #LLMInference #KVCache
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SEE YOU THERE! We're at Booth #214 at T𝙏𝙝𝙚 𝘼𝙄 𝘾𝙤𝙣𝙛𝙚𝙧𝙚𝙣𝙘𝙚 2026, Sept 30 to Oct 1 at Pier 48 in San Francisco. Come talk KV cache, GPU memory pressure, or anything else in your inference stack. See you there.
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We’re looking forward to attending the @AIconference in SF! More to come…
We're excited to welcome @tensormesh as a sponsor of The AI Conference 2026. Tensormesh is bringing production-grade context caching to AI teams by helping developers reduce repeated model work, lower costs, and scale workloads that reuse context across requests.
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Our CEO @JunchenJiang Jiang joined @heavybit's Lab Notes to talk about why KVCache should be treated as reusable, AI-native data, and not a transient cache. Covers CacheBlend, why miss rate (not hit rate) is the metric that matters, and what disaggregated prefill/decode means for KVCache infra. 🎧 heavybit.com/library/podcast…
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A cache hit isn’t automatically a latency win. If cached KV state takes longer to load than the same prefix takes to recompute, reuse can save GPU work and still make the request slower. That’s why hit rate alone is incomplete. What also matters is the cost of moving that state back: how much KV you’re fetching, where it lives, available bandwidth, contention, and how much recomputation you avoid. The goal isn’t to maximize cache hits. It’s to make reuse cheaper than recompute under the workloads you actually serve. But that gets harder as KV state moves farther from the GPU. Tensormesh is building infrastructure around that tradeoff: managing where reusable KV state lives and how it moves across memory and storage tiers, so offloading capacity doesn’t erase the performance benefit of reuse.
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🚀 𝗟𝗠𝗖𝗮𝗰𝗵𝗲 𝘃𝟬.𝟱.𝟯 𝗶𝘀 𝗼𝘂𝘁! ✨ New model support • Kimi K3 (day-0, incl. MLA-layer KV shapes) • MiniMax M3 and other Mamba models fixed for vLLM 0.26 🗂️ Fleet-wide cache directory (MP mode) • MP servers stream cache events into a shared key + token directory, with a query API, quota accounting, and global L1 token matching for CacheBlend 🔧 Highlights • Hot-plug Device-DAX L1 devices at runtime — no restart — plus batched DAX L2 loads • Faster CacheBlend retrieve: native plan executor with kernel fusion, new 𝙽𝙻_𝚇_𝙽𝙱_𝙱𝚂𝚅_𝙱𝚂𝚂 layout • AES-GCM encryption for KV cache at rest, configurable from the operator • Multimodal support in MP mode (no encoder cache yet) and non-blocking 𝚜𝚝𝚘𝚛𝚎_𝚔𝚟_𝚊𝚜𝚢𝚗𝚌 for SGLang • Prebuilt ROCm wheels (gfx942/gfx950) and NVMe FDP placement for RawBlock 𝗧𝗵𝗮𝗻𝗸𝘀 𝘁𝗼 𝗼𝘂𝗿 𝟭𝟱 𝗻𝗲𝘄 𝗰𝗼𝗻𝘁𝗿𝗶𝗯𝘂𝘁𝗼𝗿𝘀! 🙌 Full changelog: github.com/LMCache/LMCache/c… #LMCache #LLMInference #OpenSource #KVCache #ArtificialIntelligence
🤖 Made with AI
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We're excited to see Tensormesh featured in @BusinessInsider discussing one of enterprise AI's biggest challenges: reducing inference costs while maximizing ROI. As our CEO & Co-Founder, @JunchenJiang, notes: "KV cache never appears in people's token bills, but it certainly affects their costs." At Tensormesh, we're helping organizations serve more AI workloads on fewer GPUs through intelligent KV cache and model weight management. Read more: businessinsider.com/ai-cost-… #AI #GenAI #LLM #AIInfrastructure #Inference #GPU #EnterpriseAI
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A tricky LLM interview question: You're serving a reasoning model on vLLM, and it keeps running out of GPU memory on long traces. So you add KV cache compression and evict 90% of the cached tokens. VRAM usage stays as is and GPU still runs out of memory. Why? (answer below) Evicting 90% of the KV cache can free almost none of the memory it was using. This sounds counterintuitive, but it follows directly from how production servers store the cache today. The KV cache grows with every token a model generates. Each token appends its key and value vectors across every layer, and nothing is freed while generation continues. This is the dominant memory cost for reasoning models. If a 32K-token CoT caches ~32K tokens of KV vectors, a Qwen3-32B with 4-bit weights will run out-of-memory around 24K tokens on a 24GB GPU. One obvious solution is to keep the important tokens and drop the rest, since attention is sparse enough to allow it. But this does not solve the memory problem yet. The reason is paged attention, which is the memory manager behind vLLM and most production servers. Under the hood, it splits GPU memory into fixed physical blocks, each one holds the KV for about 16 tokens. This block returns to the allocator only when every slot inside it is empty. Since the eviction logic selects tokens by importance, and such tokens are scattered across blocks... ...so despite eviction, almost every block is left with at least some survivor tokens. For instance, if the logic evicts 14k of 16k tokens across 1,000 blocks, most likely every block will still have a token. This means the allocator frees almost nothing. Placing the new tokens into those freed slots is not ideal because it breaks the cache's layout. Say token 16,001 arrives, and it's placed in the slot the 40th token used to hold. The cache now reads position 38, then 16,001, then 41, so the cache is no longer in token order. Attention can still compute the right answer from that, but only if every slot now carries a separate note recording which position it actually holds. This introduces another bookkeeping cost that an in-order layout inherently avoids. So the cache is logically 90% smaller and still physically the same size. Many compression results miss this because they measure on pre-allocated contiguous tensors rather than a paged server. There's another problem. Eviction methods pick which tokens to keep by looking at the attention scores themselves (as expected). But fast attention kernels used in production, like FlashAttention, never save those scores. They compute attention in small pieces and throw the full score grid away as they go, which is also why they're fast. So the exact signal eviction methods need isn't available in memory. The workaround is to fall back to eager attention and build the full matrix, which gives up the speed FlashAttention was there to provide. NVIDIA published a method called TriAttention to solve both these problems. It never needs attention scores. Instead, it scores tokens from the geometry of the model's key and query vectors before RoPE is applied, where those vectors sit in stable clusters. For the memory problem, it runs a compaction pass every 128 decoded tokens. The surviving tokens slide forward to close the holes eviction creates, so whole blocks empty out and return to the allocator while the cache stays in token order. On long reasoning traces, the approach matches full-attention accuracy while decoding 2.5x faster and using 10.7x less KV memory. KV cache compression is a big infrastructure problem. The number that decides whether it works is the count of freed blocks, not the count of evicted tokens. You can find the NVIDIA write-up here: research.nvidia.com/labs/eai… I wrote a first-principles breakdown of how the KV cache works. It walks through why the model stores keys and values at all, why the cache grows with every token, and a comparison of LLM generation speed with and without KV caching. Read it below.
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Nick Barcet retweeted
LLM inference is often framed as a compute problem, but what if it's really a data problem? In our latest article, CTO & Co-Founder, Yihua Cheng explores why AI-native data, especially KV cache, requires a new infrastructure stack, and what that means for the future of production AI. Read more: tensormesh.ai/blog-posts/why… #AI #LLM #Inference #AIInfrastructure #KVCache
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Nick Barcet retweeted
𝗪𝗵𝗮𝘁 𝗵𝗮𝗽𝗽𝗲𝗻𝘀 𝘁𝗼 𝘆𝗼𝘂𝗿 𝗞𝗩 𝗰𝗮𝗰𝗵𝗲 𝘄𝗵𝗲𝗻 𝗮 𝗥𝗔𝗚 𝗾𝘂𝗲𝗿𝘆 𝗻𝗲𝗲𝗱𝘀 𝘁𝘄𝗼 𝗱𝗼𝗰𝘂𝗺𝗲𝗻𝘁𝘀 𝘁𝗵𝗮𝘁 𝘄𝗲𝗿𝗲 𝗻𝗲𝘃𝗲𝗿 𝗰𝗮𝗰𝗵𝗲𝗱 𝘁𝗼𝗴𝗲𝘁𝗵𝗲𝗿? Prefix caching runs into two problems: → Document B's cached state was computed without attending to document A. When a query needs both, B's cache is invalid and gets recomputed from scratch. → Reorder the same documents and it happens again. Prefix caching requires an exact match between the cached region and the new request, so any new ordering breaks that match, even when the content hasn't changed. 𝗖𝗮𝗰𝗵𝗲𝗕𝗹𝗲𝗻𝗱, built by the LMCache team, works around this by exploiting an observation about attention: most tokens attend to nearby context, and only a narrow band of tokens near each document boundary carry meaningful cross-document signal. So instead of discarding everything downstream of a miss, CacheBlend keeps each document's cached state exactly as it is and recomputes just that narrow band. The result: ⚡ 𝟮.𝟮–𝟯.𝟯× 𝗹𝗼𝘄𝗲𝗿 𝘁𝗶𝗺𝗲 𝘁𝗼 𝗳𝗶𝗿𝘀𝘁 𝘁𝗼𝗸𝗲𝗻 versus full KV recomputation 📈 𝟮.𝟴–𝟱× 𝗵𝗶𝗴𝗵𝗲𝗿 𝗶𝗻𝗳𝗲𝗿𝗲𝗻𝗰𝗲 𝘁𝗵𝗿𝗼𝘂𝗴𝗵𝗽𝘂𝘁 on multi-document queries 🔀 Reuse of the same document caches across different combinations and orderings 🎯 No meaningful loss in generation quality CacheBlend won Best Paper at EuroSys 2025 and is available through 𝗟𝗠𝗖𝗮𝗰𝗵𝗲, our open-source KV cache management layer for faster long-context inference. Thanks to @akshay_pachaar for this diagram! ⭐Star LMCache on GitHub: github.com/LMCache/LMCache #LMCache #LLMInference #OpenSource #KVCache #CacheBlend
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🚀 𝗟𝗠𝗖𝗮𝗰𝗵𝗲 𝘃𝟬.𝟱.𝟮 𝗶𝘀 𝗼𝘂𝘁! ✨ New model support • MiniMax M3 🔌 New L2 backends (MP mode) • Azure Blob Storage, Valkey (standalone + cluster), Cloud Bigtable, SageMaker HyperPod 🔧 Highlights • Async engine-driven store, Pin/Unpin + token-based delete APIs for MP coordinator • Flame-graph profiling CLI for running servers ⚠️ Two important notes: • Upgrade to v0.5.2 to run against vLLM ≥ 0.26.0 • NIXL is now an optional extra: `pip install lmcache[nixl]` Full changelog: github.com/LMCache/LMCache/c… Thanks to our 14 new contributors! 🙌 #LMCache #LLMInference #OpenSource #KVCache
🤖 Made with AI
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Nick Barcet retweeted
𝗦𝗲𝗲 𝗶𝗻𝘀𝗶𝗱𝗲 𝘆𝗼𝘂𝗿 𝗰𝗮𝗰𝗵𝗲 𝘀𝗲𝗿𝘃𝗲𝗿! LMCache now ships a built-in profiler: 𝚕𝚖𝚌𝚊𝚌𝚑𝚎 𝚝𝚘𝚘𝚕 𝚏𝚕𝚊𝚖𝚎𝚐𝚛𝚊𝚙𝚑. Optimizing LMCache's core starts with knowing where the system is working vs. waiting (both under benchmark load and in a running production server): CPU hotspots, I/O and blocking points, context-switch points, GIL contention. Run any combination of these against a live LMCache server in a single call (no need to invoke py-spy, perf, or bcc separately) and get flame graphs back automatically. Example: 𝚕𝚖𝚌𝚊𝚌𝚑𝚎 𝚝𝚘𝚘𝚕 𝚏𝚕𝚊𝚖𝚎𝚐𝚛𝚊𝚙𝚑 --𝚙𝚒𝚍 $(𝚙𝚐𝚛𝚎𝚙 -𝚏 '𝚕𝚖𝚌𝚊𝚌𝚑𝚎 𝚜𝚎𝚛𝚟𝚎𝚛') --𝚖𝚘𝚍𝚎 𝚐𝚒𝚕,𝚘𝚗-𝚌𝚙𝚞,𝚘𝚏𝚏-𝚌𝚙𝚞 It's also built into our benchmark suite (𝚕𝚖𝚌𝚊𝚌𝚑𝚎 𝚋𝚎𝚗𝚌𝚑 𝚕𝟸, 𝚕𝚖𝚌𝚊𝚌𝚑𝚎 𝚋𝚎𝚗𝚌𝚑 𝚜𝚎𝚛𝚟𝚎𝚛)! Read more here → github.com/LMCache/LMCache/p… #LMCache #LLMInference #OpenSource #KVCache
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90% of your KV cache never gets reused. (prompt caching was never meant to fix it) if your system prompt and tool definitions are stable, prompt caching is the single highest-leverage optimization available today. cached input tokens get up to 90% cheaper, and hit rates of 60 to 85% are realistic. but it comes with one rigid rule. the cached portion must be an exact, byte-for-byte prefix of the new request. change a single character in that region and you get a full cache miss. that rule breaks in three situations you hit constantly: → RAG with multiple documents. you cached document A alone and document B alone. a query now needs both. document B's cached state was computed without any awareness of A, so it's invalid and gets recomputed from scratch. → document order changes. the same three documents appear in a different order across requests. every permutation is a cache miss, even though the content is identical. → growing conversation history. each new turn changes everything after the stable prefix, so earlier cached states beyond it become useless. Alibaba Cloud's production data shows how bad this gets: 10% of KV cache blocks serve 77% of all hits. the rest sits in storage and never gets reused, because prefix matching won't allow it. CacheBlend, a research paper from the LMCache team (EuroSys 2025 Best Paper Award), attacks exactly this. the insight is that in modern transformers, tokens overwhelmingly attend to their own local context. only a small fraction of tokens carry real connections across document boundaries. so instead of recomputing everything after the first cached document, CacheBlend reuses every document's cache as-is and selectively recomputes just those few boundary tokens. those are the small orange fixes between documents in the diagram, and they are the entire cost. the result is 2 to 4x faster processing on multi-document queries with no quality loss. the order problem disappears with it. shuffle the same documents however you like, and every permutation stays cached, where prefix caching recomputes all of them every time. the bottom of the diagram shows that side by side. that's the real shift: from caching prefixes to caching knowledge. every document in your knowledge base becomes a reusable cached asset, regardless of what order it appears in or what sits next to it. CacheBlend ships inside LMCache, the open-source cache management layer that runs outside the inference engine and integrates with vLLM, SGLang, and TensorRT-LLM, on both NVIDIA and AMD GPUs. check it out on GitHub: github.com/LMCache/LMCache (don't forget to star 🌟) i wrote the full breakdown of the architecture, including why cache management should never live inside your inference engine. the article is quoted below. stay tuned for more on this!
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Nick Barcet retweeted
We're at #AMDAdvancingAI this week in San Francisco! 📍 Visit the Tensormesh team at Booth #415 to see how unified KV-cache infrastructure is making LLM serving faster, more efficient, and more scalable. 🎤 Don't miss Samuel Shen's session: "Efficient LLM Serving at Scale with Unified Caching." See you there! 🔗 Event: amd.com/en/corporate/events/… 🔗 Session: amd.com/en/corporate/events/… #AI #LLM #Inference #AIInfrastructure #KVCache
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Nick Barcet retweeted
𝗟𝗠𝗖𝗮𝗰𝗵𝗲 𝗶𝘀 𝗻𝗼𝘄 𝗯𝘂𝗶𝗹𝘁 𝗶𝗻𝘁𝗼 𝘃𝗟𝗟𝗠'𝘀 𝗼𝗳𝗳𝗶𝗰𝗶𝗮𝗹 𝗿𝗲𝗰𝗶𝗽𝗲𝘀 🎉 Head to any @vllm_project recipe with KV offload support, select 𝗟𝗠𝗖𝗮𝗰𝗵𝗲, and the recipe generates a complete working configuration, including the connector setup, server command, and tuning recommendations. LMCache is built for agentic and multi-turn workloads, long-context tasks, and RAG-heavy pipelines. Use it anywhere reusable context outgrows GPU memory. Try it on DeepSeek-V4-Pro → recipes.vllm.ai/deepseek-ai/… #LMCache #LLMInference #vLLM #OpenSource #KVCache
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