Samsung Electronics Revises Roadmap for Next Generation DRAM "D0a," Pulls Hybrid Bonding Forward Samsung Electronics has revised its next generation DRAM development strategy. The company recently moved "B1b," a technology that had been under development as a standalone project, onto its official roadmap and designated it "D0a," its first DRAM below 10 nanometers (nm). D0a originally referred to Samsung's vertical channel transistor (VCT) DRAM process. VCT DRAM has now been reclassified under a separate name, "D0a-V." Samsung changed the D0a designation to accelerate the adoption of advanced packaging in commodity DRAM. B1b refers to a technology that uses wafer to wafer (W2W) hybrid bonding to increase internal integration density. "B1b was in R&D, but it was not on Samsung's official roadmap," said a source familiar with the matter. "With this strategy revision, it has been folded into D0a. It means Samsung is actively pushing for fast commercialization of B1b DRAM." Samsung Shifts D0a Designation from VCT DRAM to B1b According to ZDNet Korea's reporting on the 23rd, Samsung has changed the definition of its next generation D0a DRAM from VCT DRAM to B1b. DRAM has advanced by shrinking internal circuit linewidths. The most recently commercialized DRAM is 1c (sixth generation 10nm class), with linewidths of around 11 to 12nm. The next product, 1d (seventh generation 10nm class), comes in at 10 to 11nm and is effectively the last 10nm class DRAM. These linewidth figures are marketing terms used to indicate performance, not actual physical dimensions. Samsung has pursued several technological shifts to realize D0a, the first sub 10nm DRAM. B1b is the most prominent of these. B1b fabricates the memory cells and the surrounding driver circuitry, known as the peri, on separate wafers and then bonds them together, stacking the cell on top of the peri. Compared with the conventional approach of integrating both cell and peri on a single wafer, this allows the cells to be packed more densely. It also lets each of the cell and the peri use a process optimized for it. B1b uses W2W hybrid bonding. Hybrid bonding joins chips by directly connecting their copper interconnects. Compared with conventional packaging that connects chips through small bumps, it improves integration density and performance. W2W hybrid bonding is also entering full scale adoption in high layer count NAND of 400 layers or more. W2W means bonding one wafer to another. Why Samsung Is Prioritizing B1b: "VCT DRAM Needs More Time" VCT DRAM, previously called the D0a process, has been renamed D0a-V as a derivative. VCT stands up the transistor inside the DRAM cell, the smallest unit that stores data, vertically instead of laying it horizontally. Making the transistor vertical reduces cell area. The conventional cell area, calculated by multiplying the feature size (F) in each direction, is 6F². VCT can bring this down to 4F². A smaller cell means more cells can be integrated in the same area. VCT DRAM, however, is considered extremely difficult technically. It requires high aspect ratio etching to form vertical transistors and new materials to address the rise in leakage current that comes with smaller cell area. W2W hybrid bonding, as used in B1b, is already in volume production in existing semiconductor processes such as CMOS image sensors and high layer count NAND. This appears to be why Samsung moved B1b ahead of VCT DRAM in priority for implementing the D0a process. "From a design standpoint, B1b has a lower barrier to commercialization than VCT, so the industry sees early adoption of B1b as likely," another source said. "Inside Samsung, too, the mood is to move faster on B1b than on VCT." **B1b to Play a Major Role in Next Generation AI Memory "HBM5"** B1b could also play a significant role in Samsung's next generation high bandwidth memory (HBM) business. Samsung is currently reviewing applying B1b to HBM5 (eighth generation). HBM5 is expected to enter mass production around 2029. Samsung is developing the product with a target of raising operating speed by roughly 50% or more over its predecessor, HBM4E. Commercialization of B1b based D0a DRAM is estimated to be at least two years away. The industry expects the specific mass production investment schedule to be finalized around the middle of next year. VCT DRAM development is continuing in parallel. The industry view is that VCT DRAM and 3D DRAM could eventually be developed on top of B1b. 3D DRAM stacks the cells themselves vertically and is expected to follow VCT DRAM. "B1b will ultimately be applied alongside VCT DRAM or 3D DRAM," said Choi Jeongdong, Senior Vice President at TechInsights. "Manufacturing the cell and peri separately brings many advantages, so hybrid bonding will serve as a platform applied together with future DRAM cell architectures."